1 . Convert +64.35 into IEEE 754 double precision floating point binary number.

2 . Explain the universal gates with their logic symbol, logic expression, truth table. Realize OR Gate using NAND Gate.

3 . Minimize given Boolean function in both SOP and POS using K-map and realize using basic gates. F(A,B,C ,D ) = Σ(0, 1,2, 5, 7, 8, 9, 10, 13,15)

4 . Explain 4-bit Binary Parallel Adder. Implement full Adder using two half Adder.

5 . Define combinational circuit. Design binary to octal converter.

6 . What is synchronous sequential circuit? Explain RS NAND latch with block diagram, logic diagram, truth table and timing diagram.

7 . Define register. Explain serial in serial out register with working mechanism for data input 11010.

8 . Explain ring counter. Design 3-bit asynchronous up counter with block diagram, count sequence table and timing diagram.

9 . Define ECL. Explain 3-bit even parity generator and checker.

10 . Explain design procedure of clocked sequential circuit. Design a clocked sequential circuit whose state diagram is given in figure.

11 . Define Digital computer. Subtract: 1010101.101 – 1000100.001 using both 1's and 2's complement.

12 . What do you mean by K-map? Explain the K-map with three variables. Simplify F(p,q,r,s) = Σ(3,4,7,8,14) which has the don’t care conditions d(p,q,r,s) = Σ(1,6,9,13) and design the logic circuit using minimum number of NAND gates.

13 . Differentiate between combinational logic circuit and sequential logic circuit. Implement a full adder circuit using decoder and two OR gates.

14 . Define priority encoder. Explain 8 to 3 priority encoder in detail.

15 . Explain the duality theorem with example. Draw a logic gates that implement following expression. F = AB + CB' + B'C F = (A + B)(B' + C') + A(C' + D + E)

16 . How flip flop differs from latch. Explain clocked SR flip flop with logic diagram, truth table, characteristic table and excitation table.

17 . Write short notes on: (any two) a) State reduction table b) Multiplexer c) Synchronous and Asynchronous counter

18 . Differentiate between PAL and PLA. Design a combinational circuit with four inputs that represent a decimal digit in BCD and four output lines that generate the 2’s complement of the input binary patterns with circuit diagram, truth table and block diagram.

19 . Explain shift register with parallel load. Design a synchronous Mod-10 counter to count in the sequence 0,2,4,5,6,8 using T flip-flop.

20 . Explain how race condition in JK flipflop can be resolved? A sequential circuit with two D Flip-Flops, A and B; two inputs, x and y; and one output, z, is specified by the following next-state and output equations: A(t+1) = xy' + xB B(t+1) = x'B + xA z = A

21 . Convert +64.35 into IEEE 754 double precision floating point binary number.

22 . Explain the universal gates with their logic symbol, logic expression, truth table. Realize OR Gate using NAND Gate.

23 . Minimize given Boolean function in both SOP and POS using K-map and realize using basic gates. F(A,B,C ,D ) = Σ(0, 1,2, 5, 7,8,9,10, 13+15)

24 . Explain 4-bit Binary Parallel Adder. Implement full Adder using two half Adder.

25 . Define combinational circuit. Design binary to octal converter.

26 . What is synchronous sequential circuit? Explain RS NAND latch with block diagram, logic diagram, truth table and timing diagram.

27 . Define register. Explain serial in serial out register with working mechanism for data input 11010.

28 . Explain ring counter. Design 3-bit asynchronous up counter with block diagram, count sequence table and timing diagram.

29 . Define ECL. Explain 3-bit even parity generator and checker.

30 . Explain design procedure of clocked sequential circuit. Design a clocked sequential circuit whose state diagram is given in figure.